From Transistor Scaling to 2D Materials: A Journey into Nanoelectronics

The rapid development of the nano-electronic industry over the past decades has relied on the process of transistor scaling to provide significant improvements to transistor performance at a reduced cost. Multiple directions have been pursued to extend the semiconductor industry’s growing trend, including searching for new material systems, designing new transistor structures, demonstrating new functionalities, and developing new applications. The semiconductor chip has two main elements: active devices (i.e., transistors) and interconnects. As for active devices, new 2-D materials (MoS2, WS2, BN, etc.) are all aggressively studied to realize high energy efficiency and memory/logic functions for system compactness. Since the discovery of graphene in 2004, researchers have focused on layer-structured materials and their applications in electron devices. This talk will present the current status and possible application developments in nanoelectronics and nanomaterials. A brief introduction is discussed to the general nanoelectronics and 2D materials for device applications. The technical challenges of 2D materials are discussed. This talk will introduce various technologies that are based on 2D materials and will be discussed possible applications. In addition, traditional silicon-based devices and the nanotechnology-enabled high-performance device will be discussed. Co-sponsored by: Northern Virginia/Washington Chap,ED15,SSC37,EP21 Speaker(s): Prof. Jeongwon Park, Virtual: https://events.vtools.ieee.org/m/369321