Week of Events
Parallel image generation on HPC systems via iLauncher
Parallel image generation on HPC systems via iLauncher
To join the video meeting, copy this link: https://meet.google.com/tqy-pifs-pwqOtherwise, to join by phone, dial +1 515-454-0917 and enter this PIN: 822 950 380#This work builds on another effort described in Application of Jupyter Notebook interfaces and iLauncher to deep learning workflows on HPC systems.Jupyter Notebook, container, Simulations, RADAR, SAR, PHD, HPC-GPS. We describe a complex workflow application which generates millions of images in parallel on an HPC system via web interfaces using ipywidgets in Jupyter Notebooks and the Interface Launcher (iLauncher). Some computations are so complicated, taking many millions of HPC hours, that only a few subject matter experts are able to generate information efficiently. We present our custom application that walks the user through a workflow to include: target selection, configuration of the target, radar phase history simulation, and finally SAR image generation. The interface requests the user to enter a minimal set of parameters while other variables essential to computations are generated on the fly and provides status updates on workflow computations. Additionally, the ability to download any data component or view images interactively is provided. This application can be disconnected from the HPC system and reconnected at any time without slowing down the computations on the workflow submitted. Although typically a maximum run time must be specified when submitting a job to the queuing interface on an HPC system, this application uses the HPC-GPS tool to allow users to extend run times even after the initial request is submitted. Our new application helps to reduce the barrier to entry for both complicated physics-based simulations and using HPC systems.Speaker(s): Dr. John Nehrbass, Virtual: https://events.vtools.ieee.org/m/294887
IEEE Dayton Section Holiday Social
IEEE Dayton Section Holiday Social
RSVP has been extended 24-hours. Please consider joining us for Dinner, but if you cannot, then attend via Zoom.Purpose: Informal social gathering to offer thanks to our members discuss how the Dayton Section can thrive in 2022!Dinner: Pick one of two entrées offered (one is vegetarian), three sides, bread and rollsSocial distancing guidelines will be in effect (masks, table spacing for 50-60)Cost: IEEE Members, FREE; Guests, $8RSVP via vTools NLT 10 Dec 2021Remote AccessFor those who cannot attend in person, you can join using Zoom.Joining infoJoin Zoom Meeting(https://udayton.zoom.us/j/88945587479?pwd=WmpMYnJ1UXVNamY1S2hMcU4xTWk2dz09) (ID: 88945587479, passcode: 963830)Join by phone(US) (tel:+13017158592,,88945587479) (passcode: 963830)(https://www.google.com/url?q=https://applications.zoom.us/addon/invitation/detail?meetingUuid%3DR5oeMOWfRfWoxpSYX42cOQ%253D%253D%26signature%3D8e04d1681f7fd302bb30d2323a6daf4b27e405081a099d6214eb8209d0a86f06%26v%3D1&sa=D&source=calendar&usg=AOvVaw3HSztVK9SlVjpS3O1ae1kW)Agenda: 4:30-5:15 PM - Sign-in & Welcome5:15-6:15 PM - Dinner (Catered by Christys) & Social6:15-6:45 PM - Informal Discussion Dayton Section Chair, Dr. Charles Cerny6:45-7:00 PM - Open Discussion and Door PrizesAmerican Czechoslovakian Club, 922 Valley St., Dayton, Ohio, United States, 45404-2068
Dayton CS Talk: AI Applications on the Intel Loihi Spiking Neural Network Processor
Dayton CS Talk: AI Applications on the Intel Loihi Spiking Neural Network Processor
Abstract: The recently developed Intel Loihi Spiking Neural Network Manycore Processor is an asynchronous computing system that performs computations based on the presence of voltage spikes. This design is extremely efficient because significant power is only consumed when spikes are propagating through the processor cores. This work discusses two algorithms for AI and autonomous decision making that have been implemented in a spiking neural network format including: M by N asset allocation and constraint satisfaction.Even after acceleration on a high performance server based computing system enhanced with a high end graphics processing unit (GPU), algorithms for solution searching do not scale well for real time use on large problem sizes. Thus, to enable real time use of allocation problems, particularly in power constrained environments (such as autonomous air vehicles), alternative implementations of the agent logic are needed, such as the proposed SNN approach. This work enables allocation algorithms to operate in portable and edge computing systems at extreme low power and computation efficiency.Furthermore, we show that constraint satisfaction problems (CSPs) can be solved quickly and efficiently using spiking neural networks. Constraint satisfaction is a general problem solving technique that can be applied to a large number of different applications. To demonstrate the validity of this algorithm, we show successful execution of the Boolean satisfiability problem (SAT) on the Intel Loihi spiking neuromorphic research processor. In many cases, constraint satisfaction problems have solution sets as opposed to single solutions. Therefore, the manycore architecture of the Loihi chip is used to parallelize the solution finding process, leading to a quasi-complete solution set. We show that embedded spiking neuromorphic hardware is capable parallelizing the constraint satisfaction problem solving process to yield extreme gains in terms of time, power, and energy.Bio: Dr. Chris Yakopcic is currently on the research faculty at the University of Dayton. He received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from the University of Dayton in 2009, 2011, and 2014 respectively. His current research includes memristor device modelling, analogue circuit design with memristor devices, and implementing neuromorphic algorithms on memristor crossbars. He now also works on developing algorithms for spiking neural network processors, and porting deep learning to low power embedded systems. In 2013 he was awarded the IEEE / INNS International Joint Conference on Neural Networks best paper award for a paper on memristor device modelling. For 2019, Chris was chosen as the IEEE Dayton Section Computer Society Award winner for his work on memristor based electronic systems for extreme low-power computation and cutting edge algorithms for autonomous systems.Speaker(s): Dr. Chris Yakopcic, Dayton, Ohio, United States, Virtual: https://events.vtools.ieee.org/m/295622