The Columbus SSCS/CAS Chapter is exited to announce a workshop series for Tiny Tapeout.
We plan to hold three 2-3 hour workshops focusing on different aspects of the digital design process. Each workshop will include an informational portion and a workshop period where participants can get hands-on experience and ask questions. By the end of the three sessions, we aim to provide participants a solid understanding of the fundamentals of the open-source design flow; allowing them to successfully submit a project to an upcoming Tiny Tapeout run (shuttles occur about once every three months). We believe that this provides an excellent opportunity for hands-on learning about Very-Large-Scale-Integration (VLSI) design in a low-stakes environment conducive to learning. The society is delighted to sponsor 15-20 enthusiastic students and professionals who are eager to participate in the Tiny Tapeout shuttles at the end of the year. Food will be provided at each event.

Workshop 1: Background and Introduction to Digital Design with Tiny Tapeout

  • Workshop Flier
  • The initial workshop will provide background information. This session will introduce semiconductor fabrication, the history of process scaling, and the basics of the digital design flow using the open-source tools. After the informational session, resources will be provided to setup development tools on personal computers so that participants can begin experimenting on their own.
  • Workshop Date: Thursday May 2nd, 2024 from 6:00PM-8:00PM
    Food is provided
  • Location: Rev1 Ventures – 1275 Kinnear Rd Columbus, Ohio United States 43212
  • Workshop Slides: Tiny Tapeout Workshop Introduction (pdf)
    If you want the Powerpoint slides, please reach out
  • Quickstart guide to use the open source simulation tools
  • Video coming soon!

Workshop 2: Introduction to Verilog and Series Project

  • The second session will focus on helping participants with any difficulty they had in setting up tools. We will also begin work on a more advanced project, providing them with a project template where they can fill in some missing pieces. The project may be expanded on to add extra features if desired, but can be fairly easily completed and submitted on its own. The informational portion of this session will introduce basic Verilog concepts and provide more details on the operation of the open-source design flow.

Workshop 3: Troubleshooting and Design Review

  • The final session may take the form of a design review, where we can both troubleshoot any issues the participants may have had, while introducing them to being able to defend design decisions that they made on their own. However, this may change based on feedback by participants.