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10:30 am

BASICS OF JITTER IN WIRELINE COMMUNICATIONS

December 7, 2018 @ 10:30 am - 11:30 am EST

Jitter refers to deviation from ideal timing in clock and data transitions. In wireline communications, jitter reduces the timing margin available for clock and data recovery (CDR) circuits and poses significant challenges to signal integrity as the data rates march towards 64Gb/s/lane and beyond. Speaker(s): Dr. Ali sheikoleslami, Location: Room: 337 Bldg: Towne Building University... Read more

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2:00 pm

CIRCUIT INTUITIONS: LOOKING INTO A NODE

December 7, 2018 @ 2:00 pm - 4:00 pm EST

Circuit Intuitions is column published regularly in the IEEE Solid-State Circuits Magazine. As the title suggests, each article provides insights and intuitions into circuit design and analysis. These articles are aimed at undergraduate students but may serve the interests of other readers as well. This talk presents the first article in this series titled "Looking... Read more

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